In the manufacture of semiconductors and integrated circuits, various films or layers of materials are deposited during the fabrication of such circuits. Dielectric films are widely deposited on semiconductor wafers to electrically isolate conductive layers and enable useful interconnects between such layers. Dielectrics, and other films, are often formed by chemical vapor deposition (CVD). The CVD process deposits a material on a surface of a substrate by transport and reaction of certain gaseous precursors on the surface. CVD reactors come in many forms. Low pressure CVD systems (LPCVD) and atmospheric pressure CVD systems (APCVD) operate on thermal CVD principles. Plasma may be employed to assist decomposition of chemicals for reaction in plasma enhanced CVD systems (PECVD), and in high density plasma (HDP) systems.
Since CVD deposits the components of the precursor chemicals, it is important to minimize contaminants in the CVD reactor environment because such contaminants may become deposited in the film. Contaminants in the film damage the function of the devices on the wafer and reduce the device yields. Metal contamination is especially detrimental on silicon wafers because the metal impurities can alter the properties of the wafer and devices after thermal processing and affect gate oxides.
Contaminants can arise from many sources. In addition to the presence of impurities in the precursor chemicals, contaminants can arise from the CVD systems themselves. During semiconductor processing metal atom contaminants may arise from some of the metal components making up the processing equipment. Such contaminants may be delivered to the semiconductor substrates where they contaminate the substrate surfaces and/or deposit in the film.
One source of metal contamination is the wafer support. In conventional systems, the wafer is typically in contact with the wafer support. During processing, contamination of the wafer can occur from the support. Additionally, contact with the wafer support can damage the backside surface of the wafer. This presents a problem when thin films are later deposited on the backside of the wafer. Scratches caused by contact with the wafer support can create defects in the films.
Moreover, for certain applications (called backseal applications) it is important that no deposition occur on the backside of the wafer during deposition on the front side of the wafer. Thus, not only is it important to minimize contact with the wafer for minimizing contamination and scratches on the wafer, it is at times important to seal the wafer from the deposition gases.
Prior art wafer carriers typically support the wafer by contacting a substantial area of the backside of the wafer. Such surface contact with the wafer promotes metal contamination and damaging of the backside surface. Another prior art wafer carrier, as described in U.S. Pat. No. 5,645,646, employs a plurality of support plates projecting from the surface of a plate to support the wafer. This design suffers from the same limitations, by providing surface contact with the wafer at a variety of locations. Moreover, this design allows deposition on the backside of the wafer and thus would not be suitable for backseal applications. It is desirable to provide a wafer support than minimizes surface contact with the substrate and is also capable of preventing deposition on the backside of the wafer.